If that int is suitably aligned (to 4 bytes), I guess that, like on most 32 bits processors, the write is somehow atomic. However, the real question is the memory model (notably in multi-core situations : cache coherency, etc.).
– Basile Starynkevitch
Even in if there is no cache coherency, the read/write to main memory would still be atomic (but delayed)
– Johan Kotlinski
@BasileStarynkevitch yes memory model is a good point, but I only have on ARM cpu with one core.
– Tony The Lion
It should be atomic, EXCEPT if that int is stored on a non-aligned address.
We use cookies to ensure that we give you the best experience on our website. If you continue to use this site we will assume that you are happy with it.OkRead more
int
is suitably aligned (to 4 bytes), I guess that, like on most 32 bits processors, the write is somehow atomic. However, the real question is the memory model (notably in multi-core situations : cache coherency, etc.). – Basile Starynkevitch