I would like to build a rule like this one in my Makefile:
log: test_A test_B
./test_A >> $@
./test_B >> $@
but test_A and test_B are part of a $(TESTS) variable.
So, is it possible to do an action (here: call the program) for each prerequisite in GNU/make?
Note: How do I make a makefile rule execute its prerequisites? does not completely solve this problem, as the target log is required (make log).