Addressing of branch equal in MIPS in tricky example (MIPS Assembly)

Question

Cheers, given the following MIPS assembly command: loop: beq $s0, $s1, loop which is the value of the lower 16 bits of the instruction in MIPS? When I put it into QtSpim I see that the lower 16 bits are ALL zeros, but that doesn't make sense to me. My thinking is:

Let the instruction be in position e.g. 80000. beq uses PC-Relative addressing. So when it's executed PC is also 80000. But it calculates the steps according to the NEXT instruction. So I say that: 80000 = 80000 (PC) + 4 (next instruction) + x (offset)*4. So I get x = -1, which makes sense to me, but this doesn't seem to be the case. What am I thinking wrong?

Interesting, looks like MARS & QtSPIM are off by 1 from each other in the branch immediate. MARS will have ffff for this branch's immediate. (Branch delay slot is off by default on both.) — Erik Eidt

Michael Michael · Accepted Answer · 2021-06-27T13:08:05

The offset is relative to the instruction in the branch delay slot. Presumably, you have configured QtSPIM such that delayed branches are disabled, which means that there are no branch delay slots. Apparently, QtSPIM's assembler then chooses to make the offset relative to the branch itself (i.e. zero).

Addressing of branch equal in MIPS in tricky example (MIPS Assembly)

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