I am currently learning on STM32F0k6 board (ARM Cortex M0) using DMA and SPI. I transmit a 72 bytes data from memory to peripheral, but after each transmission, during 86us, my signal is 0 logic (image bellow).
I am using STM32CubeIDE software and for data transmission I used HAL_SPI_Transmit_DMA() function. Data is correctly transmitted, but I want the second data to be transmitted immediately after the first one ( in other words, I want to avoid the 86 us time).
What approach should I adopt? Do you suppose that an interrupt occurs after each transmission?
Here is my code:
uint8_t buffer[72] ={
0b11111111, 0b11111111, 0b00000000, 0b11111111, 0b11111111, 0b00000000, 0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111111, 0b11111111, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,
0b11111110, 0b00000000, 0b00000000, 0b11111111, 0b00000000, 0b00000000, 0b11111111, 0b11111111, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111111, 0b11111111, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,
0b11111110, 0b00000000, 0b00000000, 0b11111111, 0b00000000, 0b00000000, 0b11111111, 0b11111111, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111111, 0b11111111, 0b00000000,0b11111110, 0b00000000, 0b00000000,0b11111110, 0b00000000, 0b00000000
};
int main(void)
{
HAL_Init();
SystemClock_Config();
MX_GPIO_Init();
MX_DMA_Init();
MX_SPI1_Init();
while (1)
{
for(unit8_t i =0 ; i <=3; i++)
{
HAL_SPI_Transmit_DMA(&hspi1, buffer, 72);
HAL_SPI_Transmit_DMA(&hspi1, buffer, 72);
}
// wait 0.5 seconds
HAL_Delay(500);
}
}
HAL_SPI_Transmit_DMA() function:
/**
* @brief Transmit an amount of data in non-blocking mode with DMA.
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @param pData pointer to data buffer
* @param Size amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
HAL_StatusTypeDef errorcode = HAL_OK;
/* Check tx dma handle */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
/* Process Locked */
__HAL_LOCK(hspi);
if (hspi->State != HAL_SPI_STATE_READY)
{
errorcode = HAL_BUSY;
goto error;
}
if ((pData == NULL) || (Size == 0U))
{
errorcode = HAL_ERROR;
goto error;
}
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
hspi->pTxBuffPtr = (uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
/* Init field not used in handle to zero */
hspi->pRxBuffPtr = (uint8_t *)NULL;
hspi->TxISR = NULL;
hspi->RxISR = NULL;
hspi->RxXferSize = 0U;
hspi->RxXferCount = 0U;
/* Configure communication direction : 1Line */
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
{
SPI_1LINE_TX(hspi);
}
#if (USE_SPI_CRC != 0U)
/* Reset CRC Calculation */
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
SPI_RESET_CRC(hspi);
}
#endif /* USE_SPI_CRC */
/* Set the SPI TxDMA Half transfer complete callback */
hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
/* Set the SPI TxDMA transfer complete callback */
hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
/* Set the DMA error callback */
hspi->hdmatx->XferErrorCallback = SPI_DMAError;
/* Set the DMA AbortCpltCallback */
hspi->hdmatx->XferAbortCallback = NULL;
CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
/* Packing mode is enabled only if the DMA setting is HALWORD */
if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
{
/* Check the even/odd of the data size + crc if enabled */
if ((hspi->TxXferCount & 0x1U) == 0U)
{
CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
hspi->TxXferCount = (hspi->TxXferCount >> 1U);
}
else
{
SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
}
}
/* Enable the Tx DMA Stream/Channel */
if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
hspi->TxXferCount))
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
errorcode = HAL_ERROR;
hspi->State = HAL_SPI_STATE_READY;
goto error;
}
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
{
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
}
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Tx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
error :
/* Process Unlocked */
__HAL_UNLOCK(hspi);
return errorcode;
}