Calculating CPI for 2 cache level?

0
votes

Assuming that the main memory access time needs 30 clock cycles, the memory access number accounts for 20% of the total number of instructions. Memory system uses L1 data cache with miss rate of 8%. CPU operating frequency is 2 GHz If we design an L2 data cache with a miss rate of 18% and a hit time of 3ns, the command cache has a hit rate of 100%. With an ideal CPI of 2 (for both order loading). What is the average CPI?

1
cachingarchitecturemipscpu-architecturecpu-cache

1 Answers

0
votes
  • 2 (ideal) +
  • 20% * 92% * 0 (L1 hits; subsumed under ideal) +
  • 20% * 8% * 82% * 3ns * 2GHz (L2 hits) +
  • 20% * 8% * 18% * 30 (L2 misses)

Adding all of the above yields 2.161512