0
votes

I have a problem with UART RX FIFO. If I power up my UART peripheral I receive a RXFE error in my LSR register, UART TX works well.

I use LPC4088 with 120MHz PCLK and 115200Baud

I tried to read the register to clear the pending error but without success. Hope some of you can help.


void UART3_Init(void){
    LPC_SYSCTL->PCONP |= (1 << 25);                 // Enable Power & CLock for UART3
    LPC_UART3->LCR = (3 << 0)                   // Word Length: 8 Bit
            |(0 << 2)                   // Stop Bit: 1 Bit
            |(0 << 3)                   // Parity Enable: disabled
            |(1 << 7);                  // Divisor Latch: enabled
    LPC_UART3->DLL = 65;                        // Divisor Latch: 65 for 115200 Baud
    LPC_UART3->DLM = 0;                     // Divisor Latch: 0 for 115200 Baud
    LPC_UART3->FCR = (1 << 0)                   // FIFO enable: enabled
            |(1 << 1)                   // RX FIFO reset: enabled
            |(1 << 2);                  // TX FIFO reset: enabled
    LPC_UART3->FDR = (0 << 0)                   // Baudrate prescaler Value: DIVADDL = 0
            |(1 << 4);                  // Baudrate prescaler Value: MULVAL = 1
    LPC_UART3->LCR &= ~(1 << 7);                    // disable to lock Baud - without this no UART communication
}


char UART3_receive(void){
    while(!(LPC_UART3->LSR & (1 << 0)));                //wait until data arrives in Rx FIFO
    return LPC_UART3->RBR;
}

int main(void){
    CCLK runs with 120MHz

    //UART 3 Pins
    LPC_IOCON->p[0][25] = (3 << 0);         //UART3 TX  p[0][25]
    LPC_GPIO->DIR = (1 << 25);
    LPC_IOCON->p[0][26] = (3 << 0);         //UART3 RX  p[0][26]
    LPC_GPIO->DIR = (0 << 26);

    UART3_Init();

    char data = 0;

    while(1){
        data = UART3_receive();

        if(data == ENTER){
            //PRINT back to terminal "SUCCESS"
            ...
            ...
        }
    }
}
1
What makes you think it's a software error? - Lundin
LPC_GPIO->DIR = (0 << 26); sets LPC_GPIO->DIR to all 0. Do you mean LPC_GPIO->DIR &= ~(1 << 26);? - the busybee
@thebusybee This might be one of them weird, complex GPIO peripherals that allow programmers to write to the same register over and over in sequence, to set several pins. This can lead to more effective code in some cases and less effective code in other cases. Seems quite common on most modern MCUs. - Lundin
@Lundin I'm aware of these, but don't they have names like *SET and *CLR? A register named DIR looks to me like a regular one. Additionally the expression on the right hand side ist 0. Which bit is ment to be reset? (Don't answer, it's just a rhetorical question. ;-) - the busybee
@thebusybee It might make sense to set DIR registers in sequence too, if you do some manner of semi-duplex bit banging. At any rate, one definitely needs to read up on these registers in the manual. - Lundin

1 Answers

0
votes

it looks like sending device has problems frame error or parity, check the senders buad rate, loop back test will make sure everything works fine.