1
votes

I'm working on STM32H753, for now on the STM32H753I-EVAL2 board. I am evaluating the external memories capabilities, in particular FMC SRAM and QSPI Flash.

I used projects from STMicro (from STM32CubeH7) and measured the duration of reading 1KB of data respectively from QSPI Flash and from FMC SRAM. In both cases, if I understood correctly, the different clocks are configured at their maximum speed (without boost, ie. CPU clock at 400MHz and so on).

I was surprised to notice that, with both D-cache and I-cache enabled, reading 1KB from QSPI Flash is almost twice faster than from FMC SRAM. I was expecting the contrary since FMC is a parallel bus.

It's the first time I'm using a FMC memory.

Do you have any idea of how FMC and QSPI compare on a STM32 ?

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Very often STM examples have a very safe FMC settings to avoid questions like: why does not demo prohgram work on my discovery or eval board? Sometimes it is 10-20 times slower than theoretical possible0___________

1 Answers

2
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Although being named the same, STM32 peripherials behaves differentely from family to family. So your question is actually family-dependent. I'll elaborate about your H7 part, but YMMV.

QSPI is actually a parallel interface as well, as it transfers data thru 4 wires simultaneously. And more than than, QSPI is synchronous, and quite fast (up to 133 MHz for certain voltage ranges) That's about 533 Mbit/s instant speed.

FMC, on the other hand, is no so fast. Max clock is 100 MHz, and it takes a few clocks to start a transfer, even if it's burst. More than that, it works in async mode as well, and it takes 5-8 clocks for a single transfer there. If your SRAM is connected to the FMC in the async mode, it would be no faster than around 15 megatransfers per second, which is 240 Mbit/s instant speed for a 16-bit part.

Most SRAM parts can do better than that, but it would reqire some FMC setting up/tweaking and maybe some glue logic to start it in the sync/burst mode.