Why the NMI function address stored in the NMI Vector address ends with the bit 1 in the ARM cortex?

0
votes

I have got a STM32-F49ZI nucleo board which is ARM Cortex 4 - 32 bits MCU. I have my own NMI handler i.e. NMI_Handler function, whose address ends with a bit 0. I can see that in the debugger. However, the vector address of NMI Handler stores the same address of NMI_Handler function except that the bit ends with 1. My question why there is a discrepancy. I got to know that this is because ARM cortex M supports only Thumb instructions i.e. 16-bit instructions only. I am unable to understand this reasoning. What's the reason behind it? Why it sets the last bit to 1.

void NMI_Handler()
{

}

Watchdog window shows

NMI_Handler address - 0x8010 1000

However, the address stored in the NMI Vector address is -

0x8010 1001.
2
armembedded

2 Answers

3
votes

Although the Cortex-M4 only supports the THUMB2 instruction set, for binary compatibility across all current ARM parts, it uses the LSB of all vector, branch and jump addresses to indicate THUMB mode in order to support ARM/THUMB interworking. It indicates to the processor that the code about to be jumped to is THUMB code. For processors that support ARM and THUMB instruction sets, it causes an instruction set mode switch if the current mode is not THUMB.

Your NMI_Handler handler function will be located at an even address as indicated in your link map, but the vector will have the LSB set. When the program-counter is loaded from a vector or branch address the LSB is set to zero.

See the "Note" box in the Cortex M4 technical reference section 3.9.1 Exception handling and prioritization

1
votes

ARM architecture of the address is odd then the instruction set is THUMB if even then it is the ARM instruction set.

So it has to be odd