How to know that what half word bits (8-bits) are to be shifted to Rd (destination register) in LDRH instruction?

Question

I'm doing a h.w in which I have to make a memory instruction format and single data path cycle for LDRH instruction. After calculating the address ( rn + extended imm12) we get a 32 bit value that store in Rd but what 8 bits in the 32 bit value( binary ) are to be stored in Rd ( I know that the 8 bits will be stored in lower end of Rd?

Also I'm working in Arm32 and consider this as an example LDRH Rd , [Rn , #imm12].

Here's the question

Consider LDRH (load half-word) instruction in the ARM ISA. The format of the instruction is as follows: LDRH Rd, [Rn,#imm12] The instruction reads 8 bits (1 byte) of data from the address speciﬁed by (Rn + 0-extended immediate value), and stores the data as a sign-extended 32 bit value into the target register Rd.

(a) Give the 32 bit instruction format for the LDRH instruction. Name the format based on your knowledge of the ARM architecture. Clearly label all the instruction ﬁelds and mention the size of each ﬁeld in bits.

(b). Modify the single-cycle ARM processor on the next page of the assignment to implement LDRH. Show all of the necessary changes in the datapath, and draw any additional control signals that may be required to implement the instruction. Please use a diﬀerent colour pen/highlighter (or diﬀerent font and line colour if providing a digital solution) than the colours on the diagram to make it easier for the markers to understand your solution.

The question is very confusing. It is either wrong or there is something you are not telling us. In ARM32 LDRH loads half-word which is 16 bits not 8. "After calculating the address ( rn + extended imm12) we get a 32 bit value that store in Rd but what 8 bits in the 32 bit value( binary ) are to be stored in Rd." - the 32 bit value is an address in memory, the smallest addressable unit in memory is a byte. So, if you need a byte - you just fetch it from the addr you calculated.. — tum_
H is not a mnemonic , will it juts excute unconditionally and in the31-28 bits we will put AL(1110)? — alex

Martin Rosenau Martin Rosenau · Accepted Answer · 2019-04-07T20:16:54

How to know that what half word bits (8-bits) ...

... and stores the data as a sign-extended 32 bit value into the target register Rd.

In ARM terminology "word" means 32 bits and "halfword" means 16 bits.

Furthermore, the LDRH instruction does not sign-extend but it zero-extends.

The instruction described here is LDRSB, not LDRH. LDRSB sign-extends 8 bits.

After calculating the address ... we get a 32 bit value that store in Rd but what 8 bits in the 32 bit ... are to be stored?

The address calculated is not stored into any register. The address is used to address a byte in the RAM (or whatever type of memory).

In other words: The address calculated is an address somewhere in the memory.

The byte stored at that address will be read.

This byte will be written to the low 8 bits of the register Rd. Because the instruction sign-extends the value, the value bit 7 of the value read will be copied to bits 31...8 of Rd. (Assuming we are talking about LDRSB.)

This is done because (as in decimal system) a positive number stays the same when prepending "zero" digits (in binary systems: bits) and in two's complement arithmetic a negative number remains the same when prepending "one" bits:

decimal 12 = decimal 0000012
01100 = 000000001100 = decimal 12
10100 = 111111110100 = decimal -12

... and a number is interpreted as "negative" number if the highest bit is set when using two's complement.

The instruction LDRB would zero-extend the value, which means that a binary number is not interpreted as two's complement number but as positive number without a sign:

10100 = 000000010100 = decimal 20

Therefore LDRB would simply set bits 31...8 to zero.

For 16-bit instructions (LDRH and LDRSH) two bytes will be read:

The byte at the address calculated will be read into the low 8 bits and the byte following that one will be read into bits 15...8. The highest bit of the second byte will be copied to bits 31...16 in the case of LDRSH; these bits will simply be set to zero in the case of LDRH.

Example:

R0 = 1234000 (decimal)

Content of the memory:
  Address 1234012: 9A (hexadecimal)
  Address 1234013: 7A (hex.)
  Address 1234014: BC (hex.)
  Address 1234015: DE (hex.)
  Address 1234016: 7E (hex.)

Program:
  LDRSB R1, [R0, #12]
  LDRSB R2, [R0, #13]
  LDRB R3, [R0, #12]
  LDRSH R4, [R0, #14]
  LDRSH R5, [R0, #15]
  LDRH R6, [R0, #14]

Results:
    R1 = FFFFFF9A
    R2 = 0000007A
    R3 = 0000009A
    R4 = FFFFDEBC
    R5 = 00007EDE
    R6 = 0000DEBC

How to know that what half word bits (8-bits) are to be shifted to Rd (destination register) in LDRH instruction?

1 Answers