Risc-v instruction that i dont understand

3
votes

I have this risc v code : 

lui S0, 0x1234
ori S1, S0, 0x5678
add S2, S1, S1

and the question asks me, "What does the register S2 hold?" The question explains that lui and I quote:

"Load the lower half word of the immediate imm into the upper halfword of register rt. The lower bits of the register are set to 0"

I don't know how to 'compile this program' and what does 0x1234 mean? Thanks

2
instruction-setriscv
0x1234 is a hexadecimal number equal to 4660 (decimal). – user47589
ok and what does the lui do – Razi Awad
You state what it does in the question. – user47589
stackoverflow.com/q/50742420/995714 – phuclv
Error: illegal operands ori s1,s0,0x5678 -- immediate operand is 12 bits only (sign extended) – Pavel Smirnov

2 Answers

6
votes

Take the instructions one at a time. First the load-upper-immediate, take the immediate (0x1234) and "load" it into the upper half of the S0 register and zero out the lower half:

lui S0, 0x1234 

S0 = 0x12340000

Next the or-immediate, we OR the value in S0 with the value 0x5678:

ori S1, S0, 0x5678

   0x12340000
OR 0x00005678
   ----------
   0x12345678 = S1

Finally the add, we are adding the value in S1 to itself or, equivalently, multiplying the value in S1 by 2:

add S2, S1, S1

  0x12345678
+ 0x12345678
  ----------
  0x2468ACF0 = S2

So the value in S2 register is 0x2468ACF0. Note, I am assuming 32-bit words. An immediate is like a constant, so lui is an instruction that places a constant into the upper half of a register. In combination with ori, you can load an entire word-immediate into a register.

0
votes

"LUI places the U-immediate value in the top 20 bits of the destination register rd, filling in the lowest 12 bits with zeros." -- riscv-spec-v2.2

so, lui s0, 0x1234

s0 should be 0x01234000