x86-64 Assembly: Understanding quadword opcode `shlq`

2
votes

I want to confirm my understanding of this specific opcode.

This line is from an assembly code from x-86-64 machine (MBP 15" 2017) and I was confused by this instruction.

shlq    $5, %rsi

So what I know is that:

  1. shl is a arithmetic logical shift
  2. q here is the suffix that stands for quadword, which is 8-byte or 64-bit in x86-64 machine.

But I wasn't sure how many total of bits it will shift.

So I did an extensive research and I found something here that looked most relevant. On page 47, it says:

sal (or its synonym shl) left shifts (multiplies) a byte, word, or long value for a count specified by an immediate value and stores the product in that byte, word, or long respectively.The second variation left > shifts by a count value specified in the CL register. The high-order bit is shifted into the carry flag; the low-order bit is set to 0.

I'm not sure what they exactly mean here, especially "stores the product in that byte, word, or long" part, but Here is how I understood:

shlq $5, %rsi

This will shift left 5 times. So that will make the value to be 2^5 = 32 times of it's original value. Then, it will do a product of that value with the corresponding word size which in this case is quadword, hence 8 bytes or 64-bits. In other words, it will be shifting 32*64 = 2048 bits or 32* 8-byte = 256 bytes total.

Am I correct?

The same above page had an example below it but I couldn't understand it.

Example

Left shift, count specified by the constant (253), the 32-bit contents of the effective address (addressed by the EDI register plus an offset of 4): shll $253, 4(%edi)

Your help will be appreciated!

Documentations researched:

https://docs.oracle.com/cd/E19641-01/802-1948/802-1948.pdf https://docs.oracle.com/cd/E19455-01/806-3773/instructionset-27/index.html https://www.engr.mun.ca/~anderson/teaching/8894/reference/x86-assembly/ https://www.cs.cmu.edu/~fp/courses/15213-s07/misc/asm64-handout.pdf https://cs.brown.edu/courses/cs033/docs/guides/x64_cheatsheet.pdf https://docs.oracle.com/cd/E19253-01/817-5477/817-5477.pdf ...and many more

1
assemblyx86-64
The actual value in rsi is shifted by 5 bits left. And that is in unsigned math equal to the rsi = rsi * 32, so that 2^5 is used only as explanation how you can think about left shift, but the shl itself will just move the bits. Also I believe the CF is set to the bit which would land into non existing b64 (i.e. b59 originally, not original top bit b63). And that documentation doesn't mention quadword, only long, so it is not up to date with 64 bit, but rsi is 64 bit register, so 64 bit value is shifted + processed. – Ped7g
Keep in mind the rsi is physically in chip 64 bits, i.e. 64 cells with encoded value 0 or 1, so "shifting them" is sort of trivial copy from one bit to another, one by one, by the correct distance between them specified as the other argument for the shl. The CPU doesn't bother with multiplication, product or powers of two, it just moves those bits and clears the bottom ones. – Ped7g
SHL is Logical shift left and SAL is arithmetic shift left. However both these instructions do the exact same thing (unlike SHR and SAR) – Michael Petch
@MichaelPetch Thanks. But I'm really curious how you found the distinction. I looked at the documentation but it only says they are synonyms. Or did I miss something? docs.oracle.com/cd/E19455-01/806-3773/6jct9o0al/index.html – Leonard
You may wish to review the generated information at Felix Cloutier's site: felixcloutier.com/x86 . The documentation there is extracted from the Intel manuals directly. – Michael Petch

1 Answers

2
votes

Your intuition is correct until the “Then, it will do a product of that value with the corresponding word size which in this case is quadword” part. That part doesn't happen. The value is just multiplied by 32, that's all there is to it.