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I'm confused about the returning process of SVC mode's program after svc instruction. Assuming currently the processor is running on SVC mode, then it's interrupted by software interrupt by svc instruction, hardware would help save CPSR into SPSR_svc, and load svc handler into PC, load the program address where it's interrupted into LR_svc. To return to SVC mode normal program where it's interrupted, we need to load LR_svc into PC, and load SPSR_svc into CPSR.

My question is that, in svc handler, LR_svc is changed, it's context is the program address where it's interrupted, so after the program returns to the normal SVC mode program, the program's LR is changed, how can the program return to the function where it's called???

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which arm core?old_timer

1 Answers

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so after the program returns to the normal SVC mode program, the program's LR is changed

Wrong assumtion. The LR is banked for SVC mode, so you changing it in SVC handler does not change the register value for user mode.