error [USF-XSim 62], [Vivado 12-4473], [VRFC 10-529], [VRFC 10-1146], [XSIM 43-3322]

Question

This is my design code

module lab2_4bit_adder(
    input [3:0] A,
    inout [3:0] B,                
    input C0,
    input [3:0] B1,
    input Switch,
    inout [3:0] B2,
    output [3:0] S,
    output C4
    );

    wire C1;
    wire C2;
    wire C3;

    assign B2 = ~B1 + 1'b1;
    assign B = (Switch == 0)? B1:B2;
    assign B = (Switch == 1)? B2:B1;
    assign B = Switch? B2:B1;

    lab2_1bit_adder fa0(A[0], B[0], C0, S[0], C1);
    lab2_1bit_adder fa1(A[1], B[1], C1, S[1], C2);
    lab2_1bit_adder fa2(A[2], B[2], C2, S[2], C3);
    lab2_1bit_adder fa3(A[3], B[3], C3, S[3], C4);
endmodule

This is my simulation

module combine_simulation(

    );

    reg [3:0] A;
    reg [3:0] B1;
    reg C0;
    reg Switch;

    wire [3:0] S;
    wire C4;
    wire [3:0] B;
    wire [3:0] B2;

    lab2_4bit_adder dut(A,B1,C0,Switch,S,C4,B2,B);

    initial begin
        A=4'b0101; B1=4'b0011; C0=1'b0; Switch=0; #10;
        A=4'b0011; B1=4'b1001; C0=1'b0; Switch=0; #10;
        A=4'b0100; B1=4'b1010; C0=1'b1; Switch=0; #10;
        A=4'b0101; B1=4'b0011; C0=1'b0; Switch=1; #10;
        A=4'b0011; B1=4'b1001; C0=1'b0; Switch=1; #10;
        A=4'b0100; B1=4'b1010; C0=1'b1; Switch=1; #10;


    end
endmodule

Simulation returns the errors

[USF-XSim 62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'F:/lab2/lab2.sim/sim_1/behav/elaborate.log' file for more information.

[Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation.

[VRFC 10-529] concurrent assignment to a non-net B1 is not permitted ["F:/lab2/lab2.srcs/sim_1/new/combine_simulation.v":37]

[VRFC 10-1146] non-net variable cannot be connected to inout port B ["F:/lab2/lab2.srcs/sim_1/new/combine_simulation.v":37]

[XSIM 43-3322] Static elaboration of top level Verilog design unit(s) in library work failed.

How can i correct the errors?

Matthew Taylor Matthew Taylor · Accepted Answer · 2018-02-12T08:55:41

The error messages are pretty helpful: " non-net variable cannot be connected to inout port B". You cannot connect a variable (ie a reg) to an inout port; connections to an inout port must be a net (the most common net type by far being a wire).

Your code needs some work. A 4-bit adder should not require bidirectional ports (ie inouts). Surely, A, B1 (the operands) and C0 (the carry-in) should be the inputs and S (the sum) and C4 (the carry out) should be the outputs. Why are B and B2 ports at all?

And what are these lines doing?

assign B = (Switch == 0)? B1:B2;
assign B = (Switch == 1)? B2:B1;

You are driving B 3 times.

error [USF-XSim 62], [Vivado 12-4473], [VRFC 10-529], [VRFC 10-1146], [XSIM 43-3322]

1 Answers