How can I make a blackbox in chisel 2.0?

Question

I wrote this code: The verilog code is just the gate:

import Chisel._

class BB_tb extends Bundle {

    val a = Bits(INPUT,  1)
    val b = Bits(INPUT,  1)
    val c = Bits(OUTPUT, 1)
  }



class BlackBox_tb extends BlackBox { 
  val io = new BB_tb() 
}

But I am getting these errors when trying to run it: I don't know what it means

run BlackBox_tb --backend c --targetDir ../emulator --compile [info] Compiling 1 Scala source to /home/essam/intensivate-developer_resources-a25f02d3592d/chisel-tutorial/problems/target/scala-2.11/classes... [info] Running TutorialProblems.TutorialProblems BlackBox_tb --backend c --targetDir ../emulator --compile [error] (run-main-0) scala.MatchError: BlackBox_tb (of class java.lang.String) scala.MatchError: BlackBox_tb (of class java.lang.String) at TutorialProblems.TutorialProblems$.main(problems.scala:9) at TutorialProblems.TutorialProblems.main(problems.scala) at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method) at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62) at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) at java.lang.reflect.Method.invoke(Method.java:498) [trace] Stack trace suppressed: run last compile:run for the full output. java.lang.RuntimeException: Nonzero exit code: 1 at scala.sys.package$.error(package.scala:27) [trace] Stack trace suppressed: run last compile:run for the full output. [error] (compile:run) Nonzero exit code: 1 [error] Total time: 18 s, completed Sep 9, 2017 2:30:45 PM

Chick Markley Chick Markley · Accepted Answer · 2017-09-11T16:53:27

How important is it that this be done in Chisel2? Chisel3 is now the standard release, and a lot of these things are easier and better supported in it. In chisel3 the following works for me.

// See LICENSE for license details.

package essan

import chisel3._
import chisel3.iotesters.PeekPokeTester
import chisel3.util.HasBlackBoxResource

class BBAnd extends BlackBox with HasBlackBoxResource {
  val io = IO(new Bundle {
    val a = Input(Bool())
    val b=  Input(Bool())
    val result = Output(Bool())
  })
  val blackBoxFloatVerilog = "/essan/BBAnd.v"
  setResource(blackBoxFloatVerilog)
}

class BBWrapper extends Module {
  val io = IO(new Bundle {
    val a = Input(Bool())
    val b=  Input(Bool())
    val result = Output(Bool())
  })

  val tb = Module(new BBAnd)
  tb.io.a := io.a
  tb.io.b := io.b
  io.result := tb.io.result
}

class BlackBox_tbTests(c: BBWrapper) extends PeekPokeTester(c) {
  // FILL THIS IN HERE
  poke(c.io.a, 1)
  poke(c.io.b, 1)
  // FILL THIS IN HERE
  step(1)
  expect(c.io.result, 1)
}

object BlackBox_tbTests {
  def main(args: Array[String]): Unit = {
    iotesters.Driver(() => new BBWrapper, "verilator") { c =>
      new BlackBox_tbTests(c)
    }
  }
}

I used the following as the underlying verilog implementation

module BBAnd(
    input  [63:0] a,
    input  [63:0] b,
    output reg [63:0] result
);
  always @* begin
  result = a & b;
  end
endmodule

The only real trick was figuring out where to put the verilog implementation. The file tree looks like.

src
src/main
src/main/resources
src/main/resources/essan
src/main/resources/essan/BBAnd.v
src/main/scala
src/main/scala/essan
src/main/scala/essan/BlackBoxAnd.scala

I ran the test from the command line with

sbt 'runMain essan.BlackBox_tbTests'

How can I make a blackbox in chisel 2.0?

1 Answers