AVR UART - FE, DOR, RXB8 bit buffering

1
votes

I was reading the datasheet for the Atmel ATmega16 microcontroller and i came to this phrase in the USART section:

The two Buffer Registers operate as a circular FIFO buffer. Therefore the UDR must only be read once for each incoming data! More important is the fact that the Error Flags (FE and DOR) and the 9th data bit (RXB8) are buffered with the data in the receive buffer. Therefore the status bits must always be read before the UDR Register is read. Otherwise the error status will be lost since the buffer state is lost.

I have no idea what buffering the Error Flags and RXB8 means. Any help will be appreciated.

2
avratmelatmega16
I guess buffering here simply means that the UDR is large enough to hold both received frame and the other FE, DOR and RXB8 bits. Any ideas? – hexpheus

2 Answers

4
votes

The main caveat here is that UDR must only be read once per incoming byte and that in reading it, the error flags mentioned get wiped out. So, if one is interested in the error flags or the "9th bit" in RXB8, then they must be read before reading UDR.

However, in ten years of AVR and serial communications designs I've never had to resort to using RXB8. Why? It's only needed when you're using 9 databits for your communications. See page 155 of the datasheet for examples in C and assembler. Most data communications use 7 or (more commonly) 8 bits, so this extra bit is not necessary most of the time. If you need it, simply follow the example on p. 155.

2
votes

More important is the fact that the Error Flags (FE and DOR) and the 9th data bit (RXB8) are buffered with the data in the receive buffer. Therefore the status bits must always be read before the UDR Register is read. Otherwise the error status will be lost since the buffer state is lost.

This just points out, that the Error Flags and the 9th data bit are (obviously) coupled to the data in the UDR FIFO and are lost as soon as you read UDR.

Example:
If you use 9 data bits, you have to read that 9th bit before reading UDR. Otherwise, the next byte in the FIFO (including its status bits) would overwrite the information of the 9th bit that belonged to the previous byte. The same applies to the error bits.