In the Sparc V8 architecture we have some N register windows. Generally an RTOS during context switching pushes and pops registers. Is it possible( or already has been done) to use each of these register windows as one of the thread. This will make switching onto next thread as good as shifting register window and pushing and popping PSR ! Thus saving context switching time and enabling faster context switching frequency.
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An implementation may have from three to 32 register windows, which would a limitation for the number of tasks that may use this approach. The V8 Arch manual describes context switching; I would expect an implementation to follow that. The V9 Arch manual mentions improvements in design for even faster context switch.
- Clifford
I am aware of your points. My question is, whether it is possible. And if it is whether it will allow super fast context switching.
- Prakhar
Don't forget that there is overlap between adjacent register windows. The output registers of one window become the inputs of the next. So even if you dedicate a register window to each task, you still need to save/restore the input registers (and of course the globals) on each context switch.
- Rob Gardner
Also keep in mind that windowed register save/restore is probably not taking a huge amount of time in a context switch. You've got traps to enter the kernel and return, changes in h/w context registers, etc.
- Rob Gardner
If you want to reduce register save/restore overhead, maybe think about a way to alert the system about which registers are actually in use. One of the problems I see with the existing schemes is that we've got a lot of registers, and they all are constantly being "pushed" and "popped". However, most of this activity is a waste of time since only a few registers are "dirty" at any given moment. For instance, look at just about any function's disassembly; even a fairly complex function doesn't use very many registers. But a context switch or register spill still saves all of them.
- Rob Gardner
1 Answers
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Maybe, it depends on what you mean by threads and how many.
The register windows are built around the idea of function calls and returns, implementing this in hardware and software traps with well defined operation. If your threads are just functions that get called in a round robin fashion etc... then yes they will get switched in this manner as will any other functions called from your "thread". That said once your have more functions than the number of register windows they will start getting paged in and out of the register file.
From the perspective of OS and User code... you don't have control of what happens when you enter and leave a register window as that is implemented as a trap as I understand it probably in the firmware. If you go changing how that works you aren't running a Sparc anymore because what it does there is defined in the Spec.
The whole point of Register windows has always been fast context switching.. but other aspects of Sparc hardware such as the TLB can get in the way of that... in the context of a Sparc MCU with a flat address space... then yeah it would be really fast.
