I am kinda confused right now. How far can a branch instruction in MIPS jump? I actually found a answer, which says +/-128 kByte, which would be 2^21 bit, if I'm not wrong. But I just don't get how this can be. On the sheet we were given at university is written that beq an bne are calculated this way PC = PC+4+BranchAddress. And the BrachAddress itself is {14{immediate[15]}, immediate, 2'b0}, which if I'm not wrong means, that there is a 16 bit immediate, where the MSB is extended by 14 "places" to the left and on the right it gets extended by 2 zeros. So wouldn't this mean that the Branchaddress has to be 2^18 bit ?
1 Answers
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You should check an instruction set reference like this. You can see that BEQ instruction for example is encoded as
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| 6 bit opcode | 5 bit rs | 5 bit rt | 16 bit offset |
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And regarding offset it states:
An 18-bit signed offset (the 16-bit offset field shifted left 2 bits) is added to the address of the instruction following the branch (not the branch itself), in the branch delay slot, to form a PC-relative effective target address
This means that the 16 bit value is left shifted by 2 (multiplied by 4, which basically aligns it to a double word) and interpreted as a signed number. This yields a value in range [-2^17, 2^17 - 1] so [-131072, 131071]. But you must take into account that the value is added to the instruction after the branch so the actual range relative to the instruction itself is [-131072+4, 131071+4].
The story is different for unconditional jump BC which has 26 bits for the offset (which are still shifted to the left by 2), so a 28 bit signed number.
