1
votes

I've been trying to get a SysTick interrupt to work on a TM4C123GH6PM7. It's a cortex m4 based microcontroller. When using the Keil Debugger I can see that the Systick interrupt is pending int NVIC but it won't execute the handler. There are no other exceptions enabled and I have cleared the PRIMASK register. The code below is how I initialise the interrupt:

systck_init LDR R0,=NVIC_ST_CTRL_R
            LDR R1,=NVIC_ST_RELOAD_R
            LDR R2,=NVIC_ST_CURRENT_R
            MOV R3,#0
            STR R3,[R0]
            STR R3,[R2]
            MOV R3,#0x000020
            STR R3,[R1]
            MOV R3,#7
            STR R3,[R0]
           LDR  R3,=NVIC_EN0_R
           LDR  R4,[R3]
           ORR  R4,#0x00008000
           STR  R4,[R3]
           CPSIE    I
           MOV  R3,#0x3
           MSR  CONTROL,R3

After a lot of searching I found that it may be the debugger masking all interrupts. The bit to control this is in a register called the Debug Halting Status and Control Register. Though I can't seem to view it in the debugger nor read/write to it with debug commands.

I used the Startup.s supplied by Keil and as far as I can tell the vectors/labels are correct.

And yes I know. Why bother doing it all in assembly.

Any ideas would be greatly appreciated. First time posting :)

1

1 Answers

0
votes

I can see that the Systick interrupt is pending int NVIC

Systick has neither Enable nor Pending register bits in the NVIC. It is special that way, being tightly coupled to the MCU core itself.

Using 0x20 for the reload value is also dangerously low. You may get "stuck" in the Systick Handler, unable to leave it because the next interrupt triggers too early. Remember that Cortex M4 requires at least 12 clocks to enter and exit an interrupt handler - that consumes 24 out of your 32 cycles.

Additional hint: You last instruction changes the register used for the SP from MSP to PSP, but I don't see your code setting up the PSP first. Be sure to implement the Hardfault_Handler - your code most likely triggers it.