Vulkan TOP/ BOTTOM OF PIPE and ALL_COMMANDS

Question

As a lot of "beginner", I thought use TOP_OF_PIPELINE as a dst and BOTTOM_OF_PIPELINE as a src meant ALL_COMMANDS for both.

Here Nicol Bolas wrote that "Since top/bottom of the pipe make no sense for memory barriers, maybe using them should just be flat-out invalid. And thus useful only for execution barriers."

From what I understand, since TOP and BOTTOM does not perform any access into memory, putting barrier on top or bottom can't make memory visible^^.

As I understand what Nicol Bolas means and what I just said about memory access / visibility, when you use bottom or top, you must set accessMask to 0.

If I want to present the image, I can do something like that :

srcStage = COLOR_ATTACHMENT_OUTPUT_BIT
srcAccess = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
oldLayout = ATTACHMENT_OPTIMAL
dstStage = BOTTOM
dstAccess = 0; // Since memory read access will be "issued" by semaphore
newLayout = PRESENT_KHR;

We use bottom here because we do not want the memory barrier make the current queue wait as it is described in the specs :

The VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT is useful for accomplishing memory barriers and layout transitions when the next accesses will be done in a different queue or by a presentation engine; in these cases subsequent commands in the same queue do not need to wait, but the barrier or transition must complete before semaphores associated with the batch signal.

So now, I can say (I hope...) that I understand when to use every stages but TOP_OF_PIPE nop...

So, there are my questions : What exactly is an execution barrier (thus without memory barrier)? Why are they useful? (because it is good to say that one operation happen after one other, but it is better to can say that we can consume the data produced in the first operation in the second operation). When should have I to put a barrier on Bottom or Top of pipeline?

Thanks !

Nicol Bolas Nicol Bolas · Accepted Answer · 2016-11-08T21:17:47

What exactly is an execution barrier (thus without memory barrier)?

It is exactly what the specification says it is: it prevents the execution of an operation until a previously issued operation is finished.

Why are they useful? (because it is good to say that one operation happen after one other, but it is better to can say that we can consume the data produced in the first operation in the second operation).

You assume that consuming data is the only thing you might be waiting on.

For example, let's say you're streaming some texture data. Well, you can't start executing the copy into that texture's memory until all uses of that texture have finished. But you aren't consuming what those processes are generating; you just need to wait until those processes are done.

That's what a pure execution barrier is for.

Since 1.0.35 has clarified the meaning of pipelines, the meaning of TOP and BOTTOM are more clear.

The specific clarification is that whatever pipeline stage you specify for source&destination specify that stage and all stages before/after it. So if you specify fragment shader as the source, then all stages that execute before it are also part of that barrier. If you specify vertex shader as the destination, then all stages after it will execute after that synchronization too.

So BOTTOM as source means after all stages in prior commands. TOP as destination means before all stages in subsequent commands. BOTTOM as destination makes no real sense, nor does TOP as source.

Note: more recent spec changes have clarified top/bottom to... not be actual stages at all. Sigh.

Instead, these "stages" are specified to mean "all stages" or "no stages", depending on whether they are specifying the source or destination scopes. TOP means all stages when acting as a destination scope, while BOTTOM means all stages when acting as the source scope.

Basically, it means the same thing as before, but without any specific idea within the Vulkan execution model that there is a stage that is the beginning of all stages.

Vulkan TOP/ BOTTOM OF PIPE and ALL_COMMANDS

1 Answers