MIPS ADDIU confusion

Question

I am doing an assignment on single cycle MIPS processor and I am a little confused on the addiu instruction.

On this website, as my reference the author states that the immediate will be sign extened

Description:
   Adds a register and a sign-extended immediate value and stores the result
   in a register
Operation:
   $t = $s + imm; advance_pc (4);
Syntax:
   addiu $t, $s, imm
Encoding:
   0010 01ss ssst tttt iiii iiii iiii iiii

If I have the following instructions

   lui      $3,0x1001
   addiu    $3,$3,0x8010

and I create my data path that sign extends addiu I would get

$3 := 0x1001_0000
$3 := 0x1001_0000 + 0x1111_8010 = 0x1000_8010

But it is incorrect according to PCSpim and I should get

$3 := 0x1001_8010

I am confused why I need to sign extend addiu, from what I understand if I do something like addiu $1, $1, -10 it should be treated as addiu $1, $1, 10 because it is unsigned.

So why does it say I should sign-extend the immediate value?

ADDIU definitely sign-extends the imm16. Are you sure your assembler isn't doing some magic when you write a constant that can't be represented by a sign-extended imm16? (i.e. addiu $3,$3,0x8010 should give a warning that it will actually assemble like addiu $3,$3,0xFFFF8010, not addiu $3,$3,0x00008010 — Peter Cordes
Also addiu $1, $1, -10 isn't the same as addiu $1, $1, 10. The 2's complement 16-bit representation of -10 is 2^16 - 10 = 0xfff6 — Peter Cordes

Craig Estey Craig Estey · Accepted Answer · 2016-07-19T07:23:07

In spim, the:

addiu    $3,$3,0x8010

is a pseudo-op and recognized as a desire for unsigned addition [by virtue of the 0x] which the addiu instruction can't do [because of the sign extension].

So, spim generates:

ori    $1,$0,0x8010
addu   $3,$3,$1

In mars, the sequence is:

lui    $1,0
ori    $1,$1,0x8010
addu   $3,$3,$1

MIPS ADDIU confusion

1 Answers