who will pass the control to ISR while cpu is executing BH

1
votes

Assume that an interrupt is occured in Unicore processor

As a general practice the scheduler is disabled and the cpu is serving the ISR

The ISR disables the current IRQ and schedules the bottom half (tasklet here) for the deferred work.

After ISR is served(IRQ is enabled) and now the processor got the change to serve the scheduled bottom half.

Mean-while again the interrupt is occurred, then the currently running BH is pre-empted and CPU executes the new ISR.

In this case who is responsible for switching the control from BH to ISR

My question is based on assuming that the scheduler is disabled and system is unicore processor.

1
linux-kerneloperating-systemschedulerinterrupt-handling
In this case who is responsible for switching the control from BH to ISR - interrupt forces processor to execute ISR, as usual. – Tsyvarev
@user3344003 'BH' is 'bottom half'. It is code to service interrupt data that runs at a lowered priority level. It is often called a deferred procedure call. – Peter L.
Thanks for your reply , can u please explain it in detail. I am asking it if my scheduler is disabled then who is responsible to pass control to ISR. @Tsyvarev – konduri praveen
@konduri praveen, passing control to the ISR is not done by the process scheduler. It is always a hardware mechanism. The scheduler itself is kicked from the timer interrupts. – subin
Thanks, on systems I had worked with they are deferred procedure calls or kernel mode asynchronous procedure calls. Not BH. – user3344003

1 Answers

0
votes

Passing control to the Interrupt handlers are not done by the process scheduler. This is a hardware mechanism. In x86, The interrupt handling routines are specified by the IDT which the kernel usually setup in the beginning.

If you are really interested in the mechanism, you can further read this and this or your processor architecture's developer manual.