Using debugger in MakeFile

Question

I've written an entire program and its makefile, the only trouble is I have to idea how to implement the debugger. I've been looking at similar questions online but to no avail.

Here's my makefile:

#  the variable CC is the compiler to use.
CC=gcc 
#  the variable CFLAGS is compiler options.
CFLAGS=-c -Wall 

assign4: main1.o ObjectManager.o
    $(CC) main1.o ObjectManager.o -o assign4

main1.o: main1.c ObjectManager.h
    $(CC) $(CFLAGS) main1.c

ObjectManager.o: ObjectManager.c ObjectManager.h
    $(CC) $(CFLAGS) ObjectManager.c

clean:
    rm -rf *o assign4

I've tried to adjust the CFLAGS: to -g Wall, but all it says is:

Undefined symbols for architecture x86_64: "_main", referenced from: implicit entry/start for main executable ld: symbol(s) not found for architecture x86_64 clang: error: linker command failed with exit code 1 (use -v to see invocation) make: *** [ObjectManager.o] Error 1

Any suggestions to fix this?

Also, debugging a c program is normally done with gdb. You just compile your program, then run it like so: gdb assign4 — wizurd

Beta Beta · Accepted Answer · 2015-11-28T03:11:41

Look at this rule:

ObjectManager.o: ...
    $(CC) $(CFLAGS) ObjectManager.c

If CFLAGS is -c -Wall, that -c means that gcc will compile the source file, but not attempt to link it. This is exactly what was intended, to produce an object file and not an executable. One consequence of this is that the source dile (ObjectManager.c) need not contain a main function-- the compiler trusts you to provide one at link time.

But if CFLAGS is -g -Wall, the -g does not imply -c. So gcc will attempt to create an executable, and abort if main is not present.

Solution:

CFLAGS := -Wall -g # the -g can be added with a conditional if you like

ObjectManager.o: ...
    $(CC) $(CFLAGS) -c ObjectManager.c

Using debugger in MakeFile

1 Answers