fiq handler for arm64

2
votes

I am trying to write an FIQ handler for arm64(AArch64) in assembly. I already have written an IRQ handler which works well so far. I was just wondering if my FIQ handler should be different from what my IRQ looks like.

  • My FIQ handler does the following:

    • Push Registers onto stack
    • Read GIC Interrupt Ack Register to identify the interrupt no.
    • Check if it is not spurious interrupt. If it is spurious branch to end of irq handler.
    • branch to corresponding high level C ISR for interrupt servicing.
    • write GIC EOIR to mark the completion of interrupt
    • pop registers from stack.
    • return to the main code.

In AArh32 FIQ used to have banked registers R8-R12,LR,SP; which were not required to push onto stack. So this was one difference from IRQ in AArch32 where all registers(except LR,SP) were required to push onto stack.

But I couldn't find what registers are banked in arm64 (except LR & SP). Could someone please tell me what should go into my FIQ for arm64. Better if someone could direct me towards an example FIQ handler for arm64.

1
interrupt-handlingarm64bare-metal

1 Answers

1
votes

Theoretically, you only need to save those registers clobbered in your interrupt handler. But from the perspective of generality, you should save all the general purpose registers (X0 to X30).

LR (Link Register) is the alias of X30 in arm64. You don't need to save SP, but you must make sure SP is unchanged while returning from FIQ handler, especially when you are programming the FIQ handler in assembly language. C compiler will take care of the stack pointer so you don't worry about that in C ISR.