3
votes

How does one insert a compiler level memory barrier using IAR embedded workbench for ARM? The equivalent in GCC would be asm volatile ("" : : : "memory")

The words barrier and fence are absent from the User Guide.

1
AFAIK, IAR uses a GCC compiler. - Basile Starynkevitch
@BasileStarynkevitch: Good one! They have their own compiler! - too honest for this site
C11 stdatomics provide a standard way - called fences. Otherwise use the intrinsics, Any way you have to carefully select which barrier you need. - too honest for this site
@Olaf: I believe that IAR does not yet support C11 just C90 or C99 - LogicG8
@TomTanner, Olaf: It's a compiler-barrier, same as the gcc-inline-assembly with memory clobber the OP posted. - EOF

1 Answers

1
votes

You can use the same inline assembler as in gcc if your IAR-tools are new enough. To get the hardware effects you can try putting a DMB instruction in the inline assembler statement or simply use the __DMB() intrinsic function.