Define a Scheme procedure (bitAdder x a b) to simulate the logic design given in following the diagram in Figure 2. The procedure must call the gate procedures that you defined in Question 1 and must return a pair with two elements '(s . c), where s is the binary sum of a, b, and x, while c is the carry-out. You will implement the procedure in three steps using three procedures, as listed below.
Write a procedure (sum-bit x a b) to generate the result bit s.
Write a procedure (carry-out x a b) to generate the carry-out bit c.
Write a procedure (bitAdder x a b) to generate the pair out put (s . c).
So far I have defined my logic gates for "and", "or" , and "xor". I tried to do the first two procedures but they seem incorrect.
(define AND-gate (lambda (a b)
(if (= a b 1)
1
0)))
(define OR-gate (lambda (a b)
(if (= a 1)
1
(if (= b 1)
1
0))))
(define XOR-gate (lambda (a b)
(if (= a b)
0
1)))
(define sum-bit (lambda (x a b)
(XOR-gate a b)
(XOR-gate x (XOR-gate a b))))
(define carry-out (lambda (x a b)
(OR-gate a b)
(AND-gate (OR-gate a b) x)
(AND-gate a b)
(OR-gate (AND-gate a b) (AND-gate (OR-gate a b) x))))
sum-bit
evaluates(XOR-gate a b)
and ignores that value, then returns(XOR-gate x (XOR-gate a b))
. You follow the same "evaluate and throw away" pattern incarry-out
. – molbdnilo