I'm trying to do a Makefile.am who find all the dependency (c and cpp files) at runtime (make).
I test this command :
example_SOURCES=$(shell find . -type f | grep -E '\.c|\.cpp' | awk '{L[NR]=$$0} END {{for (i = 1; i <=NR-1;i++) print L[i]"\\"}; {print L[NR]}}')
The command works fine ( I have controlled with the add of a redirection in a file and the sources are fine).
But the makefile, doesn't use any sources :
gcc -g -O2 -o example
How can I archive my objective for auto-founds all sources ?
p.s I have read that automake must know all sources at call, this is correct ? This can be an explanation why my script doesn't work.
More details : I have modify the Makefile generate and place an echo on example_sources and he contain all my files.
I have check the differences between the Makefile with my script and without and the main point is this part :
With script :
am_example_OBJECTS =
With manual dependency :
am_example_OBJECTS = ./main.$(OBJEXT)
He appear the automake need to know the sources files himself for generate the makefile.
example_SOURCES
and see if it has listed all of the source files. – Santosh A