ARMv8 AARCH64 instruction abort handlers?

Question

I'm running into a kernel panic that is the result of a level 3 translation returning an invalid descriptor and an instruction/prefetch abort exception being raised. Prior to the point of failure there were several successfully handled prefetch aborts in EL0 but the panic occurs when the instruction abort is raised in EL1.

I can see in arch/arm64/kernel/entry.S that there is a handler for the EL0 case (el0_ia) but there is no handler for the EL1 case.

Is it the case that an instruction/prefetch abort should never occur in EL1?

Answer 1

Your guess is correct - instruction/prefetch aborts should never occur in EL1.

The reason prefetch aborts can be handled for EL0 is that userspace operates in a demand-paged fashion, backed by filesystem storage. The kernel (including modules, even if they may have been originally loaded from a filesystem) is always mapped - so a prefetch abort means that something has gone horribly wrong.