BBB - Trouble getting second SPI chip select with device tree

Question

I have trouble to get second chip select working on the Beaglebone Black.

I used the .dts given in /lib/firmware with my distribution (Angstrom, kernel 3.8.13) :

/*
 * Copyright (C) 2013 CircuitCo
 *
 * Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;
/plugin/;

/ {
    compatible = "ti,beaglebone", "ti,beaglebone-black";

    /* identification */
    part-number = "BB-SPI1-01";
    version = "00A0";

    /* state the resources this cape uses */
    exclusive-use =
        /* the pin header uses */
        "P9.31",    /* spi1_sclk */
        "P9.29",    /* spi1_d0 */
        "P9.30",    /* spi1_d1 */
        "P9.28",    /* spi1_cs0 */
            "P9.42",    /* spi1_cs1 */
        /* the hardware ip uses */
        "spi1";

    fragment@0 {
        target = <&am33xx_pinmux>;
        __overlay__ {
            /* default state has all gpios released and mode set to uart1 */
            bb_spi1_pins: pinmux_bb_spi1_pins {
                pinctrl-single,pins = <
                    0x190 0x13  /* mcasp0_aclkx.spi1_sclk,  OUTPUT_PULLUP | MODE3 */
                    0x194 0x33  /* mcasp0_fsx.spi1_d0,      INPUT_PULLUP | MODE3 */
                    0x198 0x13  /* mcasp0_axr0.spi1_d1,     OUTPUT_PULLUP | MODE3 */
                    0x19c 0x13  /* mcasp0_ahclkr.spi1_cs0,      OUTPUT_PULLUP | MODE3 */
                    0x164 0x12  /* eCAP0_in_PWM0_out.spi1_cs1   OUTPUT_PULLUP | MODE2 */
                >;
            };
        };
    };

    fragment@1 {
        target = <&spi1>;   /* spi1 is numbered correctly */
        __overlay__ {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&bb_spi1_pins>;

            #address-cells = <1>;
            #size-cells = <0>;

                    cs-gpios         = <&gpio4 17 0>, <&gpio1 7 0>;
            spi1_0{
                #address-cells = <1>;
                #size-cells = <0>;

                compatible = "spidev";

                reg = <0>;
                spi-max-frequency = <16000000>;
            };


            spi1_1{
                #address-cells = <1>;
                #size-cells = <0>;

                compatible = "spidev";

                reg = <1>;
                spi-max-frequency = <16000000>;
            };
        };
    };
};

I compiled it with dtc and activate it with uEnv.txt :

capemgr.enable_partno=BB-SPI1-01

(Both HDMI and HDMIN capes are disabled)

I have the twos SPI device shown in /dev/ :

/dev/spidev2.0  /dev/spidev2.1

and the pins are used by the spi interface as shown :

    root@beaglebone:~# cat $PINS | grep spi1
pin 89 (44e10964): 481a0000.spi (GPIO UNCLAIMED) function pinmux_bb_spi1_pins group pinmux_bb_spi1_pins
pin 100 (44e10990): 481a0000.spi (GPIO UNCLAIMED) function pinmux_bb_spi1_pins group pinmux_bb_spi1_pins
pin 101 (44e10994): 481a0000.spi (GPIO UNCLAIMED) function pinmux_bb_spi1_pins group pinmux_bb_spi1_pins
pin 102 (44e10998): 481a0000.spi (GPIO UNCLAIMED) function pinmux_bb_spi1_pins group pinmux_bb_spi1_pins
pin 103 (44e1099c): 481a0000.spi (GPIO UNCLAIMED) function pinmux_bb_spi1_pins group pinmux_bb_spi1_pins

And the mode is good :

pin 89 (44e10964) 00000012 pinctrl-single
pin 100 (44e10990) 00000013 pinctrl-single 
pin 101 (44e10994) 00000033 pinctrl-single 
pin 102 (44e10998) 00000013 pinctrl-single 
pin 103 (44e1099c) 00000013 pinctrl-single

I successfully use a programm in C which use the first spidev (spidev2.0) with the first chip select, but the there are nothing on pin 42 when I use spidev2.1 (MOSI,MISO and CLK are working though).

Any ideas ?

Thanks in advance

How does cs-gpios = <&gpio4 17 0>, <&gpio1 7 0>; map to pins P9.28 and P9.42? — sawdust
it comes from the P9 pinout table, it refers to the gpio number of the pin. Also, the gpio number should be gpio3 17 and gpio0 7, but according to hipstercircuits.com/…, in the device tree the number of gpio bank is incremented, so it becomes gpio4 17 and gpio1 7. — user3714405

user3714405 user3714405 · Accepted Answer · 2014-06-10T10:36:10

Well I found out the answer myself :

The pin 42 is special since it's connected to two I/O. So in order to use one of the I/O, you have to put the other one as input.

source : Beaglebone black system reference manual http://www.digikey.com/web%20export/supplier%20content/ti_296/mkt/boards/BBB_SRM.pdf?redirected=1 page 71.

But now i have an other issue really strange... I posted it here : Trouble with SPIDEV, device tree and .dtbo name with Beaglebone Black

BBB - Trouble getting second SPI chip select with device tree

1 Answers