Maximum SIMD integer multiplications on Ivy Bridge using SSE/AVX?

Question

Would somebody be able to advise me how I can work out the maximum number of 32-bit unsigned integer multiplications I would be able to do concurrently on an Ivy Bridge CPU using SIMD via SSE/AVX?

I understand AVX did have 256-bit registers for multiplication but this was for floating point (AVX2 introduced 256-bit integer registers). Therefore I am not overly sure whether it would be better to use floating-point registers for integer multiplication (if thats even possible)?

In addition, I am unsure whether it matters on just the number of registers, or whether I need to look at the ports of the CPU. Looks like port 0 and port 5 can handle SSE integer ALU?

you could use double instead. All 32-bit integers are represented exactly by double — phuclv
@LưuVĩnhPhúc: While that's true, it also takes more space and only 4 fit in an AVX register, completely defeating the purpose. You can already fit four 32-bit integers in an SSE register. — Ben Voigt
Guys I found this example of what I need but its for signed integers, does anyone know how to change it for unsigned? stackoverflow.com/questions/10500766/… — user997112
Signed and unsigned multiplication are the same thing by the way, there's only a difference if you want the upper half as well. — harold

harold harold · Accepted Answer · 2014-04-20T17:00:42

You can do one pmulld = 4 multiplications per clock.

Therefore I am not overly sure whether it would be better to use floating-point registers for integer multiplication (if thats even possible)?

Nothing like that is possible. You can put 8 integers in an ymm register of course, but then you're stuck. The instruction you'd need to do something useful with them is in AVX2.

Maximum SIMD integer multiplications on Ivy Bridge using SSE/AVX?

2 Answers