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This question concerns the use of interrupts to handle the input and storage in memory of data arriving at an input interface, and the consideration of data rates that be achieved using this mechanism. In this particular question, the arrival of each new data item triggers an interrupt request to input and store the data item in a queue in memory.The question is about calculating the maximum data rate achievable in this scenario.

You are first required to calculate the time to respond to an interrupt from the interface, run the interrupt service routine (ISR) and return to the interrupted program.From this and the number of data bits input on each interrupt, you are required to calculate the maximum data rate in bits per second, that can be handled. Below you are given: the number of clock cycles the CPU requires to respond to the interrupt and switch to the ISR, the number of instructions executed by the ISR, the average number of clock cycles executed per instruction in the ISR, the number of bits in the data item input on each interrupt, and the clock frequency. [You can assume that when the CPU can be immediately interrupted again as soon as the ISR completes, but not before this]

clock cycles to respond to interrupt = 15
instructions executed in ISR = 50
average clock cycles per instruction = 8
number of bits per data item = 8
clock frequency = 5MHz

a) What is the time in microseconds to respond to an interrupt from the interface, run the interrupt service routine (ISR) and return to the interrupted program?

b) What is the maximum data rate in Kbits/second (K is 1000 , not 1024)?

Answers 
a) 83.0
b) 96.4

Can anyone explain the answers please?

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1 Answers

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A. (50 instructions * 8 cycles per instruction + 15 cycles for response)/ 5 Mhz = (50*8 + 15) / 5 = 83

B. ( 8 bits per isr / 83 usecs/isr) * 1000 = (8/83)*1000 = 96.385

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