10
votes

I am new to ARM and trying to understand MRC instruction.

As I understood , MRC is to read Coprocessor registers and put it into main Core register.

Now Coprocessors are attached to main core and is used to control the memory subsystem of main core.How Coprocessors are attached to main core processor .Could anyone point to some good Digram?

Now this below instruction on arm7 cpu core

  /* workaround to disable secure state */
     mrc     p15, #0, r0, c1, c1, #0
     orr     r0, r0, #1
     mcr     p15, #0, r0, c1, c1, #0
     isb

Now I just couldn't find what is going on in mrc instruction here

1.First argument to mrc is coprocessor number(how p0 is different from p15).

2.Second Argument is opcode1 of coprocessor(Not sure about it).

3.Third argument is main core register(Ok with it).

4.fourth and fivth argumnet is co processor registers(Is result of c1,#0 is stored to c1 )?

5.Agin final Argument is opcode2 (Not sure about it).

Thanks

1
The MRC/MCR instructions are generic. You have to refer to specific documents. VFP, Neon, and CP15. The CP15 is a catch all for things not built-in to the instruction set and is intended for OS programmers. It may include MMU, cache control, protection unit, fast context switch, write buffer, TrustZone, HyperVisor, Vector table, etc. CP15 does not remain backwards compatible as the instruction set does.artless noise
Thanks @artlessnoise for these useful links.Amit Singh Tomar
did you mean ARMv7 instead of ARM7?old_timer

1 Answers

30
votes

Coprocessor in ARM is a misleading notion. It's shorthand for an optional piece of functionality that is not exposed via the core instruction set. ARM CPUs are modular. There are bits and pieces of CPU hardware that implementers of the architecture may or may not place on the chip. The memory management unit (MMU) is one example; there are others, such is the hardware debugging facility. Those are, indeed, identified by coprocessor number (pXX), so that more than one coprocessor can be present at the same time. The coprocessor number for MMU is traditionally p15. Coprocessors p0..p14 have nothing to do with memory management and may not be present. The debugging subsystem, for example, is p14.

The MRC and MCR commands are used to send commands to coprocessors. The mnemonic is, again, somewhat misleading - the effect of a command can be more than just a register move. It's more like MRC stands for "send a command to a coprocessor and get some data back" and MCR is "send a command to a coprocessor and pass some data along". Think of it that way. That's what the opcodes are for - that's the command to the coprocessor. Sometimes, a MCR/MRC command with a particular coproc # and opcode would even get separate mnemonic in the assembler (e. g. FPU commands).

The exact specifics of coprocessor opcodes and register numbers vary from one copropcessor to another. Since it's the MMU that you're interested in, read up on that particular one; it'll explain how do specific operations map to opcodes and coproc register numbers.