PCIe read write within ISR

Question

I'm modifying a linux PCIe driver to work with altera FPGA PCIe core. Inside my driver code, I'do pci_set_master(dev) to make the PCIe read write working.

I'm using altera SG-DMA to do PCIe transfer instead of using ARM DMA. I need to write enable bit to the FPGA DMA to initiate the transfer. It is working perfectly by doing pcie write(barx,offset,data) to the enable bit register.

The problem is, I need my system to initiate the PCIe FPGA DMA when an I/O interrupt happen, but when interrupt happen, inside the ISR i put the pcie write(barx,offset,data) and this cause the whole linux hang there.

Anyone have face this before? Please help me. Thanks in advance.

Answer 1

According to me your problem is not the FPGA but it is the way your interrupt is being handled. You may want to isolate this problem and ask with proper tags. Don't include PCIe or the FPGA, since there is a high probability that they are not part of your current problem.

The PCIe drivers you are using for your SGDMA are different for different FPGAs. Since you are manually calling the functions for read and write to the PCIe-FPGA interface it looks like there might not be an issue with this part (PCIe driver) also. The functions you use will not be known to others, so no point in sharing that in your question also.

I will suggest you to read more about IO interrupt handling. Try something other than polling for the interrupt event.