xmm register sse x64 value inside

Question

I'm writing project to shool in x64 assembly. I'm using nasm compilator. I know that xmm registers can store 4 x 32 bit or 2x64 bit. I wandered to know how i can put 4 float values (32 bit) into xmm1 for example. My function has header curve(float * x, float * y, int a, int b) and x is pointer to 5 element array. I was looking for some information but I still don't know how to do it properly. Thanks for help in advance! (ps. if you have any tutorials including informations about sse it will be very helpful)

software.intel.com/sites/products/documentation/studio/composer/… — Mysticial
this project is full in assembly - I mean that I have to do this function definition in assembly only. — p_piorkowski
Then your best bet is to compile from C code and look at how the compiler does it. In short, it isn't trivial - at least to be efficient, it's not trivial. (Though I warn that VC++ can generate pretty stupid code for these set intrinsics.) — Mysticial
I know it's not trivial and that's why I've asked. And I also know it's very efficient and that's reason why i want to learn about it... Maybe some tutorial or something like this...? — p_piorkowski
Generally speaking, if you find that (un)packing data is a bottleneck, then you should probably change the memory layout make vector operations more "vertical". — Mysticial

Alex I Alex I · Accepted Answer · 2013-01-02T17:14:55

You can use one of the movdqa, movdqu, movaps, movups, movapd, movupd instructions to load values into a 128bit SSE register (xmm) from memory. The movdqa, movaps, movapd require 16-byte aligned memory access (and are faster).

Incidentally, doing one point at a time with SIMD would require a lot of code changes. Better bet is to do 4 at a time (because SIMD has 4 lanes of single precision floating point). Then you can (more or less) just replace each regular instruction with the same vector instruction.

xmm register sse x64 value inside

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