I was looking at a embedded x86 system design document. An I/O board that contains a Xilinx FPGA is connected to the linux x86 PCI bus. The FPGA implementation is described as below:
• PCI interface core to connect to the x86 PCI bus
• Xilinx MB soft processor
• Xilinx OPB bus (this is a processor bus for the MB)
• PCI <-> OPB interface to allow the PCI bus to access all OPB peripherals
• Interrupt controllers for dealing with interrupts from internal/external devices.
• Dual port RAM connected to PCI and OPB for MB/x86 communication
After the connection, it claims that x86 will now be able to access 'MB processor', 'Dual port RAM', 'peripherals'.
Then it claims that the PCI board itself publishes two sets of resource. Resource 0 is a 4Meg region for interfacing into the MB processor and the IO points on the ioboard. Resource 1 is the Dual port RAM interface between the MB processor and x86.
I am new to linux device driver and just start learning.
Could anyone explain a little what it means that 'the PC board itself publish two set of resources'? Does it mean after plug in the board (install driver necessary?) linux OS will detect some resource?
And how will this resource information be used in writing device driver for the IO board? Or maybe in writing separate device drivers for MB, RAM and peripherals?
Thanks,
