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I'm developing an application for DOS. I need to communicate via parallel port.

Currently I'm stuck at how can I determine which of the PCI function's BAR(Base address registers) contain the base address(ie data port address) for that parallel port? :?

Precisely, is there a industry convention or standard or de-facto standard that a particular BAR will always contain the base address for that parallel port ?

If not, then how can I determine the base address for that PCI parallel port(whether on pci expansion card or integrated on mobo)?

Actually I'm concerned with parallel ports on PCI expansion cards. AFAIK, BIOS doesn't know about these. BIOS will only allocate resources to the pci card(s) and that's it. So, there might not be the entries for such parallel ports in BDA, as BIOS manufacturer knows only about ALL the devices their mobo has.

For eg, say on a PC, I installed 4 parallel ports on pci expansion card(s) , and there is 1 parallel port integrated\embedded on mobo. Now where does the entry for other 2 parallel ports go?

That's why it seems that the BIOS has entries only for three parallel ports integrated \ embedded on chipset or motherboard. So, I think we must read PCI BARs to get the base address for any parallel port on pci expansion card installed on mobo.

Thanks

2
What is the manufacturer / model # of the PCI-to-LPT chip on your board?myron-semack
@msemack- Actually, I'm trying to write a generic driver, that is independent of vendor and product type - something like we have PCI IDE controller spec. But till now it seems that such a universalisaton is impossible due to varying implementations b/w different vendors. Only one's practical experience with such cards can guide him/her.After searching over, I realized, that many such cards implement both parallel port and serial port in a single PCI function, and the base addresses of these parallel port and serial port are of course in different bars. I wonder, ...jacks
...what is the Subclass code of such a PCI function? I guess it would be either 02h or 80h. If that is the case, then I can't search for all parallel ports present in the system by simply searching for a parallel port subclass 01h. Even if the card contains either all parallel ports or all serial ports, then in some cards, two or more serial(or parallel) ports may share a single BAR. One is at offset 0 and other is at offset 0x08 say, and so on. :(jacks
Yeah, this would be chip-specific. That's why I asked for the Manufacturer of the chip. The Mfr datasheet will tell you what you need to know.myron-semack

2 Answers

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The memory based list of parallel ports (including serial ports) is limited to only three entries (originally was 4 in IBM PC). It's designed for old ISA based systems when Plug an Play (PnP) technology doesn't exist yet.

On newer systems, the BIOS PnP functions should be used to detect any PCI based parallel port devices. This involves scanning through all PCI devices to find the one that is a Communication Device class with sub-class of Parallel Port. Get the Intel's Plug and Play BIOS Specification directly from Intel website (PDF file) or from ACPI website. You'll find in that document how to access the PnP BIOS functions.

Note that since some systems may still have an onboard parallel port(s), you'll still need to also detect its presence using BIOS memory. If there are less than three onboard parallel ports, additional PCI based parallel ports should also be listed in that memory. However, it's recommended to assume that they aren't, since there might be a bug in the BIOS. So combine the detection result from both the memory and PnP BIOS, then remove any duplicate.

If you want to detect the actual parallel port to make sure it exists and working, check the VirtualBox's BIOS assembly source code (originally from Bochs' BIOS). Specifically, the detect_parport function.

EDIT: More details on current configuration of PCI devices.

The current configurations of PCI devices are stored in Extended System Configuration Data (ESCD). This is also referred as NVRAM by some BIOSes. The method for retrieving its data is described in PnP BIOS specs' function 0x41 and 0x42. However, the ESCD specs is separate from PnP BIOS specs. You can get it here (PDF file).

I couldn't find the link from Intel's website, sorry. They used to provide these old specs and also searchable from their website, but they're difficult to find now. I had mine still in RTF formats. That PDF ESCD specs seems to be the last version and same as mine, which is version 1.02A.

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afaik you cannot send data to the pci parallel port via base address if there is a built in parallel port configured in bios, one way to send to that pci parallel is by disabling the parallel port in the bios...

I already tested this scenario and it works fine in my side.

but if you want to use many ports, like the built in and the pci parallel ports, for built in port you can use the io base address, but for pci parallel port, you need to know the driver provided by the pci parallel port's manufacturer... if it is a system supplied driver, maybe there is a way to hook their driver via public ioctl or via accessing the driver as normal file..

I used generic port running on windows 7.