I have a problem in giving initial value zero to a signal type of matrix2D in VHDL. I defined it as follows:
type matrix2D is array (integer range <> , integer range <> ) of signed(2 downto 0);
and in my VHDL code for initial value I wrote:
process(matrix1, matrix2, s_out_adder)
variable v_flipflop_adder: matrix2D(0 to 4, 0 to 4) :=((0 to 4),(others =>(others=>'0')));
begin
....
But unfortunately it doesn't work.
Does anyone know how I can define initial value zero for the matrix2D?