ARM Cortex-M3 example for interrupt pending

Question

With an ARM Cortex-M3, such as an NXP LPC1788, why would someone use the Interrupt Set-Pending Register(s) or Interrupt Clear-Pending Registers?

Can someone provide a simple, canonical example of using these registers?

what have you tried so far? did you look at the interrupt controller documentation from ARM for this core? — old_timer
@dwelch Yes, I have been reading the User's Manual. I am using the NVIC and various Interrupt Clear registers. I was wondering if there was a common use for the Set-Pending and Clear-Pending registers. — Josh Petitt

Turbo J Turbo J · Accepted Answer · 2012-08-02T12:10:45

The only use case I can think of is the triggering of a low-priority software excaption form a high priority IRQHandler - like the GPIO interrupt handler.

Normally you would use PendSV for that, but when you have more than one task or priority level you can use any unused peripherial exception vector. Could be useful in programs that use the Sleep-on-Exit feature - where the µC will only run in exception handlers.

// Example for LPC17xx
void   ETHERNET_Handler (void)
{
    // toggle LED on P0.4
    LPC_GPIO0->FIODIR0 ^= (1<<4);
}

void main(void) 
{
    // set Ethernet IRQ to loewst Priority
    NVIC_SetPriority(ENET_IRQn,31);
    NVIC_EnableIRQ(ENET_IRQn);
    NVIC_SetPendingIRQ(ENET_IRQn); // trigger Ethernet IRQ Handler
    // ...
    while (1);

}

ARM Cortex-M3 example for interrupt pending

1 Answers