I'm working on something in Assembly where it takes a string for an instruction, such as
add $t1, $t0, $t1
and prints out the instruction in hex.
I scan the string piece by piece, with add being recognized first. Add has an op code of 001000 (6 bits)
t1 is scanned, and it compares itself to the data section, and it has a value of 5 bits 01001, same with t0 with 01000, and t1 again at 01001. All these are scanned in order so precedence isn't that important as far as I can tell.
From then, I know I need to smush these together somehow and then convert from binary to hex. My problem is, I'm not sure how I'm supposed to be storing these binary values as they're read. Whether to store them in the data section, which doesn't seem right due to their odd bit sizes, or if there is some easier way.
Honestly, I don't know much about bit shifting, so the answer may lay in there.
Here's my code. It's very much a WIP
#text segement
.text
.globl main
main:
li $t0, 0 #pointer for input
li $t1, 0 #pointer for storing
li $t2, 0 #parser
li $t3, 0 #temp hold t0
li $t4, 0 #hold reg num
li $t8, 0 #number of reg
li $v0, 8
la $a0, input
li $a1, 32
syscall
la $a0, input
li $v0, 10 #end
syscall
scan:
lb $t2, input($t0)
#beq $t2,'$',pass
beq $t2,' ',pass
beq $t2,'*',next
beq $t2,',',next
beq $t2,10,end
sb $t2, inst($t1)
addi $t1,1
addi $t1,1
j scan
next:
move $t3, $t0 #store in t3 temporarily
move $t0, $0
move $t1, $0
move $t2, $0
next2:
lb $t2, inst($t0)
beq $t2,'$',register #t2 = $, reg
bge $t2,65,funct #t2 >= 65, funct
ble $t2,57,num #57 >= t2, num
funct:
lb $t2, inst($t0)
beq $t2, 'a', afunct
beq $t2, 's', sfunct
beq $t2, 'm', afunct
afunct:
lb $t2, inst($t0)
sfunct:
mfunct:
num:
lb $t2, inst($t0)
register:
addi $t0, 1
lb $t2, inst($t0) #get reg type
addi $t0, 1 #increase pointer
lb $t4, inst($t0) #find reg num and convert to t4
addi $t4, -48
beq $t2, 't', treg
beq $t2, 'a', sreg
beq $t2, 'v', vreg
treg:
mult $t4,4
mflo $t4
lw $t2, tr($t4)
areg:
mult $t4,4
mflo $t4
lw $t2, ar($t4)
vreg:
mult $t4,4
mflo $t4
lw $t2, vr($t4)
.data
input: .space 32
inst: .space 32
tr: 01000,01001,01010,01011,01100,01101,01111
sr: 00100
vr: 00010
a: 001000