I have Xilinx ISE 13.1 installed on an ACER laptop with Win7 (64bit).
After installing the software (WebPACK version) I created an empty VHDL module and ran "check syntax". The process failed with the following errors:
Error:HDLParsers:3016 - "C:/Users/..." Library unit standard required for unit std_logic_1164 does not exist in library std.
and
Error:HDLParsers:3046 - "C:/Users/..." Line 21. Library unit STD_LOGIC_1164 is not available in library IEEE.
This also occurs if I run synthesize.
Googling solutions hasn't been very effective and the hyperlink for the error in ISE leads to a "page not found" result from the Xilinx website.
If anyone can shed any light on this I'd be very grateful.