When do we need wand/wor in Verilog?

0
votes

The Verilog standard clearly states that there is no functional difference between a wire and a tri. The differentiation is that of convention. A wire net is used for nets driven by a single gate or continuous assignment while the tri net can be used where multiple drivers drive a net [$4.6.1]. Given this fact, I have these questions:

  1. What exactly do we need tri for? By convention, it should be used when multiple drivers are driving a net. But then, if multiple drivers are driving a net, we should be using triand/trior for resolution, right? Or could there be a case where multiple drivers are driving a net and we don't want to use any of triand/trior for resolution but use tri instead?
  2. What is the use for wand and wor? If multiple drivers are involved, by convention, we should use triand and trior. So why do they exist? And when do we need them?

Thanks,

1
verilogsystem-verilogsystem-verilog-assertions

1 Answers

3
votes

The wire and tri keywords were designed to document the user's intent that a signal could have the tristate Z value at some point in time. However Verilog never implemented any kind of check to enforce this usage. So now they are simply keyword synonyms (same as reg and logic being synonyms with no functional difference).

Wired-or or Wired-and logic get created by certain transistor technologies. (See open-collector circuits)