Compile error for custom0 custom instruction

Question

I'm trying to design simple accelerator to be familiar with RoCC and its interface in spike, and access it through RoCC command(such as custom0, custom1, ...)

In fact, I follow some guides described in cs250 lab4 from Berkeley by using master branch of riscv tools.(Actually, guides are different from this, but I could understand basic ideas, so I go through it.)

However, it seems that it does not work well.

First of all, I just build riscv tools in repository, and then I tried to compile dummy_rocc_test.c which resides in riscv-isa-sim/dumy_rocc

but it produces following outputs when using command:

riscv64-unknown-elf-gcc -o d ./dummy_rocc_test.c

./dummy_rocc_test.c: Assembler messages:
./dummy_rocc_test.c:13: Error: unrecognized opcode `custom0 x0,a5,2,0'
./dummy_rocc_test.c:15: Error: unrecognized opcode `custom0 a5,x0,2,1'
./dummy_rocc_test.c:18: Error: unrecognized opcode `custom0 x0,a5,2,3'
./dummy_rocc_test.c:20: Error: unrecognized opcode `custom0 a5,x0,2,1'
./dummy_rocc_test.c:23: Error: unrecognized opcode `custom0 x0,a5,2,2'
./dummy_rocc_test.c:24: Error: unrecognized opcode `custom0 x0,a5,2,3'
./dummy_rocc_test.c:25: Error: unrecognized opcode `custom0 a5,x0,2,1'

Did I miss something before compiling this? or Should I have to modify some build option even though I want to use dummy extension?

groups.google.com/a/groups.riscv.org/forum/#!topic/sw-dev/… — sailfish009

Pavel Smirnov Pavel Smirnov · Accepted Answer · 2018-02-05T15:33:58

By default recognition of custom0/custom1 is off.

Try to use -march option with custom suffix:

riscv64-unknown-elf-gcc -march=rv64imafdxcustom -o d ./dummy_rocc_test.c

Note: old toolchain use upper case ISA extensions symbols, i.e:

-march=RV64IMAFDXcustom

Compile error for custom0 custom instruction

1 Answers