3
votes

I have started reading about PCI and PCIe. I came across a point "From a software standpoint, PCI and PCI Express devices are essentially the same. PCIe devices had the same configuration space, BARs, and (usually) support the same PCI INTx interrupts".

PCIe uses a serial interface while PCI uses a parallel interface. Then how can a linux driver written for the PCI can be used for a PCIe device? I am confused. Please help.

regards,

Ajmal

2
Your confusion from hardware design prospective, where the busses are different by almost all means. From software design prospective it's otherwise, they are quite similar, though there are few minor additions in PCIe.0andriy
Then, in a software perspective, can we use the same driver(Linux) for PCI and PCIe(+additional features)? Is the Bus access will be same?Ajeesh
Yes. See also my comment to below answer. All stuff you are worrying about is done in the host bridge / bus driver itself.0andriy
From my limited understanding of PCI vs PCIe. PCIe use the same old config registers as PCI (plus some extra config register space). From the Linux driver perspective, the CPU/OS access the same config registers in the PCI/PCIe end-point regardless of how the write/read access is carried out in the physical media, i.e., parallel bus (PCI) vs serial link (PCIe). The OS/driver sees the same address space. As long as the definition the address space looks the same, it is compatible.hevangel

2 Answers

0
votes

PCI and PCIe are completely different at physical layer. PCI is parallel where as PCIe is serial. PCI bus is shared by all the PCI devices whereas PCIe has dedicated channel for data transfer. These differences are taken care at the software layer. So, programmer doesn't need to worry about it.

0
votes
  1. PCI supports 256B config space. PCIe has 4K config space and is backward compartable for the first 256B
  2. Yeah, PCI is parallel and PCIe is serial and that change is inherent in PHY layer.
  3. PCI supports INTx (1-4) SW interrupts while PCIe supports PCI interrupts and additional 32 interrupts from PCI-X and 2K interrupts from PCIe.
  4. AER (Advanced Error Reporting) is supported by PCIe