Closely coupled memory in Synopsys ARC processors

Question

I am studying about Synopsys ARC EM processors (EM4 in particular). And I came across what they call as Closely Coupled Memory (CCM).

According to their documents this a single cycle access RAM (capacity up to 2MB), which is used to store both instructions and data. In EM4, CCM is used without a cache memory or a scratchpad memory. And this is not even a type of Tightly Coupled Memory (TCM) as far as I understand.

I wanted to find out how this memory can be this fast, but until now I haven't been successful. (I guessed it's hard to be an SRAM because of the large capacity.)

Answer 1

Your question seems off-topic for StackOverflow.

However, "closely coupled memory" seems (to me) to be marketing-speak for "on-chip memory". SRAM can be very fast - unlike DRAM where addresses are multiplexed adding need for multiplexing, static RAM decodes from the full address bus and can work as fast as the logic gates in the silicon can address the storage locations. 2MB is perfectly in-scope for SRAM. EM6 has cache - so the choice is up to the designer whether to pay premium for (presumably) better performance of EM6, while also not precluding the cost-conscious market which the EM4 is aimed at. The term "tightly coupled memory" seems basically to be another (marketing) term for on-chip memory, used to distinguish it from "bus-based systems" where memory would be off-chip, slowing things down, taking more power, taking more board space, etc.