When do you use a block statement in a VHDL design and when do you not?

3
votes

I come from SW world and recently I've started to create FPGA designs in VHDL. I've read about the block concurrent statement and its principal uses like organize architecture grouping concurrent code and guard signals, which is not recommendable.

But this is one of many possibilities in order to implement the same functionality. For instance, I've been implemented a CRC frame checker with a VHDL function. It has one bit value input, and return a register with the cumulative CRC value of all bit inputs.

I think the same functionality can be implemented with a block. What is the best option for resource utilization? When would you use a block and when would not? Which is the best case to implement a block?

Thanks,

1
vhdl
A simple answer: do not use the block statement. – Matthew Taylor
Another simple answer : when you need to declare signals within a statement such as a GENERATE statement, that doesn't have its own declaration region. Or when you want to group together signal declarations and some statements such as a process that use them. – user_1818839
@BrianDrummond With a generate statement, there is an optional begin which gives you an optional declarative region to declare "local" signals. I'm interested in your other suggestion, though. Can you give an example? – Matthew Taylor
yes on the 'generate' statement - the declarations there are called a {block_declarative_item} (in Ashenden at least) so the block is actually implicit. On the other, one example would be a process describing a pipeline where you can use either signals or variables for pipeline registers, but using variables, you would have to describe the pipeline backwards. Using signals you can describe it forwards (first stage first), but if you want to keep these local signal declarations local, one way is a block. (I had an example in another Q/A but can't find it atm) – user_1818839
@BrianDrummond hmmm... interesting. Do you know of a synthesiser that would understand it, however? – Matthew Taylor

1 Answers

2
votes

What is the best option for resource utilization?

There should be no different between with or without block in terms of resource utilization. This assumes that you're creating the same logic.

When would you use a block and when would not?

Similar to software, the only reason you want to use block statement is when you want to limit the scope of the variables used within a portion of the code. This can significantly improve code readability in a large design where signals can be declared and utilized in the same region.

I would not recommend anyone to use block statement in a small design, or where component instantiation is more appropriate.

Which is the best case to implement a block?

When it improves code readability.