Difference between implied and immediate addressing mode?

Question

Implied: operands are specified implicitly in the definition of instruction. Examples: CLA,CME,INP.

It is mainly used for Zero-address (STACK-organized) and One-address (ACCUMULATOR-organized) instructions.

Immediate: operand is specified in the instruction itself and mainly for constants . Example: ADD R1,#3 ,MUL R1,R2,#7

but the question comes how to check the instruction:

1) PUSH 3

and

2)LD 7

First one is a zero address instruction (Stack based) and the second is an accumulator instruction. In both instructions the operand is defined in the instruction itself. Which addressing mode is preferred, or best describes them?

How to check whether the instruction is implied or immediate?

Further examples of implicit operands on x86: SAHF, LAHF, and CPUID.

source: https://en.wikipedia.org/wiki/CPUID

In assembly language the CPUID instruction takes no explicit parameters as CPUID implicitly uses the EAX register (and sometimes ECX) to determine the information returned in EAX,EBX,ECX, and EDX.

source: http://www.felixcloutier.com/x86/LAHF.html

LAHF — Load Status Flags into AH Register
This instruction executes as described above in compatibility mode and legacy mode. It is valid in 64-bit mode only if CPUID.80000001H:ECX.LAHF-SAHF[bit 0] = 1.

source: http://www.felixcloutier.com/x86/SAHF.html

SAHF — Store AH into Flags
Loads the SF, ZF, AF, PF, and CF flags of the EFLAGS register with values from the corresponding bits in the AH register (bits 7, 6, 4, 2, and 0, respectively). Bits 1, 3, and 5 of register AH are ignored; the corresponding reserved bits (1, 3, and 5) in the EFLAGS register remain as shown in the “Operation” section below.

This instruction executes as described above in compatibility mode and legacy mode. It is valid in 64-bit mode only if CPUID.80000001H:ECX.LAHF-SAHF[bit 0] = 1.

usage example: (source: https://www.slideshare.net/rbtaccess/flag-control )

MOV AH, 25H       ; immediate source operand
SAHF              ; implicit operands

more examples include CLC, STC, and CMC, which clear, set, or flip the carry flag CF respectively. (CF is a bit in FLAGS, not a whole register.)

How to check whether the instruction is implied or immediate? That doesn't really make sense. You have to look at each operand separately, not the whole instruction. e.g. PUSH implicitly stores to the stack, but its explicit operand can be a register, or immediate. On some architectures, like x86, PUSH can even accept a memory operand. PUSH r/m32 is one opcode, and the addressing mode selects between memory or register source. — Peter Cordes
@Peter if the instruction is PUSH A the operand is in memory then is it implied mode because the operand is not the ACTUAL OPERAND ? — Kamal Pratap
@PSPCODER: this question is clearly about some kind of accumulator architecture, where that operand is always implicit. Replacing most of the question with x86 examples is not appropriate. Your edit would work better as an answer, or possibly a separate section to the question after the original text. — Peter Cordes

Peter Cordes Peter Cordes · Accepted Answer · 2016-09-01T07:06:42

An instruction like PUSH has two operands: the implicit destination and the explicit source. That explicit source can be a register, an immediate, or (on some ISA like x86), an explicit memory operand like push qword [rdi + rax*8].

Implicit, register, explicit-memory, or immediate is a property of an operand, not the whole instruction.

You can't label the whole instruction as using either implicit or immediate. You could talk about just the source operand being implicit vs. immediate for some simple accumulator ISAs, but your question also showed what looked like ARM instructions as examples of immediate.

An instruction where all the operands are of the same category could be said to use implicit operands, for example. e.g. x86's movsd instruction has two operands, and both are implicit memory operands. (It copies from [rsi] to [rdi], and increments both pointers. Or decrements according to DF, so that's another implicit input).

x86's inc instruction has only one operand, which can be register or memory. (Actually FLAGS is an implicit output operand, like for most x86 instructions).

push 3 decrements the stack pointer and stores to memory (using the new value of the stack pointer as the address). This is true on x86, and many other architectures (stack grows down and points to the last thing pushed).

So if we want to get into the full details, push imm8 has the following operands:

implicit read/write register operand: the stack pointer (rsp)
implicit memory destination: [rsp]
immediate source value: the 8-bit source, sign-extended to 64-bit.

We're ignoring x86 segmentation, or we could count ss as an extra implicit input operand, along with rsp).

Difference between implied and immediate addressing mode?

3 Answers